school

thing1's amazing school repo
Log | Files | Refs | Submodules | README

2.asm (614B)

      1 start: 
      2 init: 
      3 	clrf     PORTA          ; make sure port A output latches are low 
      4 	clrf     PORTB          ; make sure port B output latches are low 
      5 	bsf      STATUS,RP0     ; select memory bank 1 
      6 	movlw 	 b'11111111'    ; set port A data direction to inputs 
      7 	movwf 	 TRISA         
      8 	movlw 	 b'00000000'    ; set port B data direction to outputs 
      9 	movwf 	 TRISB          
     10 	bcf      STATUS,RP0     ; select memory bank 0 
     11 	goto     main 
     12 	
     13 main: 
     14 	movlw 	 b'00000111'    
     15 	movwf	 PORTB
     16 	call 	 wait1000ms
     17 
     18 	movlw 	 b'11100000'    
     19 	movwf	 PORTB
     20 	call 	 wait1000ms
     21 
     22 	goto 	 main
     23 	END		        ; ends the program